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Reduced Reconfigurable Logic Circuit Design Based on Double Gate CNTFETs Using Ambipolar Binary Decision Diagram

机译:使用双极性二元决策图的基于双栅极CNTFET的简化可重构逻辑电路设计

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This letter describes the design methodology for reduced reconfigurable logic circuits based on double gate carbon nanotube field effect transistors (DG-CNTFETs) with ambipolar propoerty. Ambipolar Binary Decision Diagram (Am-BDD) which represents the cornerstone for automatic pass transistor logic (PTL) synthesis flows of ambipolar devices was utilized to build DG-CNTFET based n-input reconfigurable cells in the conventional approach. The proposed method can reduce the number of ambipolar devices for 2-inputs reconfigurable cells, incorporating the simple Boolean algebra in the Am-BDD compared with the conventional approach. As a result, the static 2-inputs reconfigurable circuit with 16 logic functions can be synthesized by using 8 DG-CNTFETs although the previous design method needed 12 DG-CNTFETs for the same purpose.
机译:这封信描述了基于具有双极性质的双栅极碳纳米管场效应晶体管(DG-CNTFET)的简化可重构逻辑电路的设计方法。在传统方法中,利用双极性二进制决策图(Am-BDD)表示双极性器件的自动通过晶体管逻辑(PTL)合成流程的基石,以构建基于DG-CNTFET的n输入可重构单元。所提出的方法可以减少用于2输入可重构单元的双极性器件的数量,与传统方法相比,将简单的布尔代数合并到Am-BDD中。结果,尽管先前的设计方法出于相同的目的需要12个DG-CNTFET,但是可以通过使用8个DG-CNTFET来合成具有16个逻辑功能的静态2输入可重配置电路。

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