A 1-GHz Portable Digital Delay-Locked Loop with Infinite Phase Capture Ranges

摘要

This paper describes a 1-GHz portable digital delay-locked loop (DLL) with 0.15-μm CMOS technology. There are three factors contributing to jitter in digital DLLs. One is supply-noise induced jitter, another is jitter caused by delay time resolution and phase step in the delay line, and the third is jit- ter caused by the sensitivity of the phase detector.