An Ultra-wide Range Digitally Adaptive Control Phase Locked Loop With New 3-phase Switched Capacitor Loop Filter

摘要

It is an innovative idea for modem PLL generation to control the bandwidth proportionally to the reference frequency. Recently, a frequency of the operating clock in microprocessors has been required to be changed frequently and widely in order to manage power consumption and throughput. A new compact switched capacitor (SC) filter which has fully flat response has been developed for adaptive biased PLLs. We have also developed a new digital control method for achieving the wider frequency range. The measured performances of the test chip were good enough for the use in the microprocessors.