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Superconductor/Semiconductor Hybrid Analog-to-Digital Converter

机译:超导体/半导体混合模数转换器

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We have designed a superconductor-semiconductor hybrid analog-to-digital (A/D) converter and experimentally evaluated its performance at sampling frequencies up to 18.6 GHz. The A/D converter consists of a superconductor front-end circuit and a semiconductor back-end circuit. The front-end circuit includes a sigma-delta modulator and an interface circuit, which is for transmitting data signal to the semiconductor back-end circuit. The semiconductor back-end circuit performs decimation filtering. The design of the modulator was modified to reduce effects of integrator leak and thermal noise on signal-to-noise ratio (SNR). Using the improved modulator design, we achieved a bit-accuracy close to the ideal value. The hybrid architecture enabled us to reduce the integration scale of the front-end circuit to fewer than 500 junctions. This simplicity makes feasible a circuit based on a high T_C superconductor as well as on a low T_C superconductor. The experimental results show that the hybrid A/D converter operated perfectly and that SNR was 84.8 dB (bit accuracy ~13.8 bit) at a band width of 9.1 MHz. This converter has the highest performance of all sigma-delta A/D converters.
机译:我们设计了一种超导体-半导体混合模数(A / D)转换器,并通过实验评估了其在高达18.6 GHz采样频率下的性能。 A / D转换器由超导前端电路和半导体后端电路组成。前端电路包括一个sigma-delta调制器和一个接口电路,用于将数据信号传输到半导体后端电路。半导体后端电路执行抽取滤波。修改了调制器的设计,以减少积分器泄漏和热噪声对信噪比(SNR)的影响。使用改进的调制器设计,我们获得了接近理想值的位精度。混合体系结构使我们能够将前端电路的集成规模减小到少于500个结。这种简单性使得基于高T_C超导体和低T_C超导体的电路成为可能。实验结果表明,该混合型A / D转换器运行良好,在9.1 MHz的带宽下SNR为84.8 dB(位精度〜13.8位)。该转换器具有所有sigma-delta A / D转换器中最高的性能。

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