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A Diagnosis Testbench of Analog IP Cores for Characterization of Substrate Coupling Strength

机译:用于表征基板耦合强度的模拟IP内核诊断测试台

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摘要

A diagnosis testbench of analog IP cores characterizes their coupling strengths against on-chip environmental disturbances, specifically with regard to substrate voltage variations. The testbench incorporates multi-tone digital noise generators and a precision waveform capture with multiple probing channels. A prototype test bench fabricated in a 90-nm CMOS technology demonstrates the diagnosis of substrate coupling up to 400 MHz with dynamic range of more than 60 dB. The coefficients of noise propagation as well as noise coupling on a silicon substrate are quantitatively derived for analog IP cores processed in a target technology, and further linked with noise awared EDA tooling for the successful adoption of such IP cores in SoC integration.
机译:模拟IP内核的诊断测试台可表征其抗片上环境干扰的耦合强度,尤其是针对基板电压变化而言。该测试台结合了多音调数字噪声发生器和具有多个探测通道的精确波形捕获。采用90纳米CMOS技术制造的原型测试台演示了诊断高达400 MHz且动态范围超过60 dB的基板的能力。对于在目标技术中处理的模拟IP内核,定量地得出了在硅基板上的噪声传播系数以及噪声耦合系数,并进一步将其与具有噪声意识的EDA工具相链接,以成功在SoC集成中采用此类IP内核。

著录项

  • 来源
    《IEICE Transactions on Electronics》 |2011年第6期|p.1016-1023|共8页
  • 作者单位

    Graduate School of System Informatics, Kobe University, Kobe-shi, 657-8501 Japan;

    Graduate School of System Informatics, Kobe University, Kobe-shi, 657-8501 Japan;

    Graduate School of System Informatics, Kobe University, Kobe-shi, 657-8501 Japan;

  • 收录信息 美国《科学引文索引》(SCI);美国《工程索引》(EI);
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

    on-chip diagnosis; on-chip monitoring;

    机译:片上诊断;片上监控;
  • 入库时间 2022-08-18 00:26:49

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