机译:适用于4 K×2 K H.264 / AVC编码器的基于8×8/4×4自适应Hadamard变换的FME VLSI架构
State Key Lab. of ASIC & System, Fudan University, Shanghai, 200240, China;
College of Information Science and Engineering, Shandong University of Science and Technology, Qingdao, 266510, China;
College of Information Science and Engineering, Shandong University of Science and Technology, Qingdao, 266510, China;
State Key Lab. of ASIC & System, Fudan University, Shanghai, 200240, China;
College of Information Science and Engineering, Shandong University of Science and Technology, Qingdao, 266510, China;
fractional motion estimation; adaptive block-size hadamard transform; H.264/MPEG4 AVC; 4K×2K; quad full high definition;
机译:H.264 / AVC中基于变换的帧内预测的高效VLSI架构
机译:H.264 / AVC中VBS Hadamard变换的寄存器长度分析和VLSI优化
机译:高吞吐量VLSI架构,用于基于H.264 / AVC上下文的自适应二进制算术编码(CABAC)解码
机译:基于8×8/4×4自适应Hadamard变换的QFHD H.264 / AVC编码器全模式FME VLSI架构
机译:H.264 / AVC视频编解码器的自适应运动估计架构。
机译:一种在医疗保健的H.264 / AVC编码视频中同步嵌入生理信号的数据隐藏技术
机译:用于H.264 / aVC视频编码的帧内预测和模式决策的高性能VLsI架构