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Pseudo Floating Point Representation For Non-binary Turbo Decoder Extrinsic Information Memory Reduction

机译:非二进制Turbo解码器本征信息存储约简的伪浮点表示

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摘要

A method is presented that can substantially reduce the memory requirements of non-binary turbo decoders by efficient representation of the extrinsic information. In the case of the duo-binary turbo decoder employed by the IEEE 802.16e standard, the extrinsic information memory can be reduced by about 43%, which decreases the total decoder complexity by 18%. We also show that the proposed algorithm can be implemented by simple hardware architecture.
机译:提出了一种方法,该方法可以通过有效表示外部信息来大大减少非二进制Turbo解码器的存储需求。在IEEE 802.16e标准采用双二进制Turbo解码器的情况下,外部信息存储器可减少约43%,这将使总解码器复杂度降低18%。我们还表明,所提出的算法可以通过简单的硬件架构来实现。

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