ループ解析に基づく安定化設計手法を適用した5.8GHz 帯DSRC車載器用送受信システムMMIC

摘要

A high integrated SiGe-MMIC transceiver having voltage controlled oscillator (VCO), phase locked loop (PLL), dual-transmit block for amplitude shift keying (ASK) mode and pi/4-quadrature phase shift keying (QPSK) mode, and common receiver block for the dual modes is developed for 5.8GHz dedicated short range communications (DSRC) terminals. To obtain stability of transceiver using differential configuration, which has on-chip closed loops generated by common ground/Vcc pad arrangement and differential pairs, the stabilized MMIC design method based on the loop analysis is introduced to it. In the loop analysis, the both on-chip loops of differential mode and common modes are considered, maximum loop gain of less than -3dB all over the frequency range is defined as the absolute stabilized condition. The simulated results for each loops show that isolation resistors inserted in bias feed line are effective for improving the stability. The effectiveness of the design method is evaluated by the measured results.%VCO，PLL，ASK及びπ／4 QPSK各変調方式に対応する2つの送信系と共通の受信系を内蔵する5.8GHz帯DSRC車載器用送受信システムSiGe-MMICを開発した.チップ上でのグランド端子や電源端子共通化などにより形成される閉ループ回路をもつ高集積MMICの安定性を検討するために，従来のループ解析を差動系MMICに展開した安定化設計手法を導入する.平衡モードと不平衡モードの全閉ループに対し各ループ利得を位相条件に関係なく-3dB以下に抑えることを絶対条件とし，満足しない場合には抵抗を装荷することによりアイソレーション改善を図る.本安定化設計手法の有効性は，シミュレーション結果と評価結果の比較により示す．