机译:尾部卷积码的错误网格构造
Graduate School of Science and Engineering, University of Toyama 3190 Gofuku, Toyama 930-8555, Japan;
Information Technology Center, University of Toyama 3190 Gofuku, Toyama 930-8555, Japan;
Graduate School of Science and Engineering, University of Toyama 3190 Gofuku, Toyama 930-8555, Japan;
tailbiting convolutional codes; dual state; tailbiting error-trellis; tailbiting backward error-trellis;
机译:尾部卷积码的错误网格构造
机译:尾部卷积码的错误网格构造
机译:尾部卷积码的错误网格构造
机译:使用移位代码/错误子序列同时减少卷积代码的代码/错误网格
机译:最大距离可分离卷积码,构造和解码。
机译:用于尾纹卷积码的加权维特比解码器的深组合
机译:1使用移位代码/错误子序列减少卷积码的同时代码/错误网格
机译:某些非系统卷积码的修剪误差网格解码