A zero-voltage switching (ZVS) scheme for a three-level capacitor clamping inverter based on the true pulsewidth modulation (PWM) pole is proposed in this paper. With this scheme, the main switches work with ZVS through the assistance of a small rating zero current switching (ZCS) lossless auxiliary circuitry without imposing any voltage/current spikes on the main devices or any extra control complexities. Consequently, a three-level capacitor clamping inverter system can operate at a promoted switching frequency and becomes more eligible to be considered for high-power advanced applications, for example, in high-speed drives or power active filter areas. In this paper, the main circuit operation issues as regards the clamping voltage stability, damping capacitor stress, and output voltage spectrum are shortly reviewed first, after which the commutation principle, auxiliary circuitry stress analysis, and auxiliary circuitry designing methodology are presented in detail. Experimental results from a 700 V supply 3 kW half-bridge three-level capacitor clamping inverter are demonstrated which conform well to the proposal.
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