A 1.65 W Fully Integrated 90 nm Bulk CMOS Capacitive DC--DC Converter With Intrinsic Charge Recycling

摘要

A fully integrated high power density capacitive 2:1 step-down DC–DC converter is designed in a standard CMOS technology. The converter implements the presented flying well technique and intrinsic charge recycling technique to deliver a maximum output power of 1.65 W on a chip area of 2.14 mm $^{2}$, resulting in a power conversion density of $hbox{0.77}, hbox{W/mm}^{2}$. A peak power conversion efficiency of $hbox{69}hbox{%}$ is achieved, leading to an efficiency enhancement factor of $+hbox{36}hbox{%}$ with respect to a linear regulator. This is for a voltage step-down conversion from twice the nominal supply voltage of a $hbox{90 }$ nm technology ($hbox{2}V_{{bf dd}} = hbox{2.4}, hbox{V}$) to $hbox{1}, hbox{V}$.