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Switch-Mode Power Supplies Minimum-Deviation Digital Controller IC for DC–DC Switch-Mode Power Supplies

机译:开关电源DC-DC开关电源最小偏差数字控制器IC

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This paper introduces a hardware-efficient digital controller integrated circuit (IC) for single- and two-phase dc–dc converters that recovers from load transients with virtually minimum possible output voltage deviation. In steady state, the IC behaves as a conventional voltage-mode pulsewidth modulation controller. During load changes, it enters transient suppression mode that utilizes a simple algorithm, requiring no knowledge of the converter parameters and virtually no processing power, to seamlessly recover back to the steady state without exposing components to a high-current stress. To further minimize the area and power consumption of the IC, an asynchronous track-and-hold analog-to-digital converter (ADC) is developed. The ADC utilizes only one preamplifier and four comparators having approximately ten times smaller silicon area and power consumption than a comparable windowed flash ADC. To compensate effects of converter losses and system delays on the controller operation, the IC also incorporates duty ratio correction logic and dual-extreme point-based detection. The entire IC is implemented in a CMOS 0.18-μm process on a 0.26-mm$^2$silicon area, which is comparable to the state–of-the-art analog solutions. The functionality of the controller is tested with both single- and two-phase commercial 12–1.8 V, 500-kHz 60/120-W buck converter power stages. The results demonstrate seamless transition to the steady state with virtually minimum output voltage deviation. For the experimental system, this deviation is about four times smaller than that of a fast PID compensator having a one-tenth of the switching frequency bandwidth.
机译:本文介绍了一种用于单相和两相dc-dc转换器的具有硬件效率的数字控制器集成电路(IC),该器件可从负载瞬态中恢复,且输出电压偏差几乎最小。在稳定状态下,IC表现为常规的电压模式脉宽调制控制器。在负载变化期间,它进入瞬态抑制模式,该模式使用简单的算法,无需了解转换器参数,几乎不需要处理能力,即可无缝地恢复到稳态,而不会使组件承受高电流应力。为了进一步最小化IC的面积和功耗,开发了一个异步采样保持模数转换器(ADC)。该ADC仅使用一个前置放大器和四个比较器,它们的硅面积和功耗比可比较的窗口式Flash ADC大约小十倍。为了补偿转换器损耗和系统延迟对控制器操作的影响,IC还集成了占空比校正逻辑和基于双极点的检测。整个IC在0.26mm ^^ 2 $的硅面积上以CMOS0.18-μm工艺实现,这与最新的模拟解决方案相当。该控制器的功能已通过单相和两相商用12–1.8 V,500 kHz 60/120 W降压转换器功率级进行了测试。结果表明,输出电压无缝过渡到稳态,输出电压偏差几乎最小。对于实验系统,此偏差约为开关频率带宽十分之一的快速PID补偿器的偏差的四倍。

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