Stability Analysis of AC–DC Full-Bridge Converters With Reduced DC-Link Capacitance

摘要

Voltage ripple in single-phase ac–dc converters is usually disregarded to design the dc-link voltage control system, since large dc-link electrolytic capacitors are typically employed. However, replacement of electrolytic capacitors by film capacitors has been widely considered for increasing reliability. Consequently, due to cost constraints, such replacement usually employ low capacitance and may be combined with fast dc-bus voltage controllers. This paper shows that the conventional linear time-invariant (LTI) model may not represent the real converter behavior for reduced capacitance and/or faster controllers, leading to poor system performance or even instability. In this way, for any of these cases, the linear time-periodic (LTP) model is highly encouraged for stability and transient analysis as a tool for the controller design. Experimental results confirm that stability margins are precisely obtained from the LTP model but may not from the LTI model. Finally, this paper also compares both LTI and LTP models while considering the control gain and the dc-bus capacitance size. It is graphically revealed that the phase margin of the LTI model diverges from the LTP model for low dc-bus capacitances and high control gains.