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首页> 外文期刊>IEEE Transactions on Microwave Theory and Techniques >Spiral inductors and transmission lines in silicon technology using copper-damascene interconnects and low-loss substrates
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Spiral inductors and transmission lines in silicon technology using copper-damascene interconnects and low-loss substrates

机译:硅技术中的螺旋电感器和传输线,使用铜-镶嵌互连和低损耗衬底

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Spiral inductors and different types of transmission lines are fabricated by using copper (Cu)-damascene interconnects and high-resistivity silicon (HRS) or sapphire substrates. The fabrication process is compatible with the concepts of silicon device fabrication. Spiral inductors with 1.4-nH inductance have quality factors (Q) of 30 at 5.2 GHz and 40 at 5.8 GHz for the HRS and the sapphire substrates, respectively. 80-nH inductors have Q's as high as 13. The transmission-line losses are near 4 dB/cm at 10 GHz for microstrips, inverted microstrips, and coplanar lines, which are sufficiently small for maximum line lengths within typical silicon-chip areas. This paper shows that inductors with high Q's for lumped-element designs in the 1-10-GHz range and transmission lines with low losses for distributed-element designs beyond 10 GHz can be made available with the proposed adjustments to commercial silicon technology.
机译:螺旋电感器和不同类型的传输线是通过使用铜(Cu)-大马士革互连和高电阻率硅(HRS)或蓝宝石衬底制造的。制造过程与硅器件制造的概念兼容。对于HRS和蓝宝石衬底,具有1.4nH电感的螺旋电感器的品质因数(Q)在5.2 GHz时为30,在5.8 GHz时为40。 80 nH电感器的Q高达13。对于微带线,倒置微带线和共面线,在10 GHz时,传输线损耗接近4 dB / cm,对于典型的硅芯片区域内的最大线长而言,它们足够小。本文表明,通过对商业硅技术的建议调整,可以提供适用于1-10-GHz范围内的集总元件设计的高Q电感器和适用于10 GHz以上的分布式元件设计的低损耗传输线。

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