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首页> 外文期刊>Microwave Theory and Techniques, IEEE Transactions on >Efficient Least-Squares 2-D-Cubic Spline for Concurrent Dual-Band Systems
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Efficient Least-Squares 2-D-Cubic Spline for Concurrent Dual-Band Systems

机译:并发双频系统的高效最小二乘二维三次样条

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This paper presents and compares two types of 2-D cubic-spline (2-D-CS) digital predistorters for linearizing a power amplifier (PA), which is used in dual-band transmitters. In the conventional 2-D-CS representation, the gain functions must be first extracted using an alternate basis, whereas in the proposed 2-D least-squares cubic-spline (2-D-LSCS) approach, a new 2-D-CS basis is introduced such that the basis weights can be extracted directly from the measured data using the least-squares method. The 2-D basis functions are calculated from 1-D basis functions to reduce the signal-processing resource usage in the real-time implementation. A field-programmable gate-array (FPGA) test bench integrating the concurrent dual-band RF system is utilized to verify the linearization performance of the new 2-D-LSCS predistorter. Two different test scenarios involving three carrier-wideband code division multiple access and long-term evolution signals, which are 310 MHz apart, are considered. The experimental results on a 10-W dual-band PA shows that the proposed 2-D-LSCS basis improves the performance up to 3 dB in both the adjacent channel power ratio and normalized mean square error with reduced FPGA resources and faster extraction time when compared to the conventional 2-D memory-polynomial and 2-D-CS approaches.
机译:本文介绍并比较了用于线性化功率放大器(PA)的两种类型的2-D三次样条(2-D-CS)数字预失真器,该放大器用于双频发射机。在传统的2-D-CS表示中,必须首先使用替代基础提取增益函数,而在建议的2-D最小二乘三次样条(2-D-LSCS)方法中,使用新的2-D-CS引入CS基础,以便可以使用最小二乘法直接从测量数据中提取基础重量。从一维基函数中计算出二维基函数,以减少实时实现中信号处理资源的使用。集成了并行双频RF系统的现场可编程门阵列(FPGA)测试台被用来验证新型2-D-LSCS预失真器的线性化性能。考虑了两个不同的测试场景,其中涉及三个相距310 MHz的载波宽带码分多址和长期演进信号。在10W双频PA上的实验结果表明,所提出的2-D-LSCS基础可将相邻信道功率比和归一化均方误差的性能提高多达3 dB,同时减少了FPGA资源并缩短了提取时间。与传统的2-D记忆多项式和2-D-CS方法相比。

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