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The Enhancement of Q Factor for Patterned Ground Shield Inductors at High Temperatures

机译:高温下图案化接地屏蔽电感的Q因子增强

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We report on an effective way of using a patterned ground shield (PGS) to enhance the Q factor of on-chip spiral inductors. We fabricated PGS inductors using both 0.18 μm and 0.35 μm CMOS processes, with Ml and poly strip PGSs, respectively. The strip width and spacing of the PGSs are W{sub}g - 0.8 μm and S{sub}g = 0.45 μm, with metal thicknesses of t{sub}p = {0.54,0.2} μm in the 0.18 μm process, and t{sub}p = {0.6,0.3} μm in the 0.35 μm process. The separation distance D between PGS and top metal layer is different in both processes. We found that the Q factor degradation of inductors at high temperatures can be effectively compensated by using PGS. Among all geometric parameters of a PGS in the 0.18 μm process, the parameter D is the critical factor for the shielding effectiveness, and Ml PGS is much more efficient than poly strip PGS in improving the inductor performance over the temperature range of 298 K to 358 K. However, in the 0.35 μm process the latter is better than the former.
机译:我们报告了一种使用图案化接地屏蔽(PGS)来增强片上螺旋电感器Q因子的有效方法。我们分别使用M1和Poly Strip PGS使用0.18μm和0.35μmCMOS工艺制造了PGS电感器。 PGS的带宽度和间距为W {sub} g-0.8μm,S {sub} g = 0.45μm,在0.18μm工艺中,金属厚度为t {sub} p = {0.54,0.2}μm,并且在0.35μm工艺中,t {sub} p = {0.6,0.3}μm。在这两个过程中,PGS与顶层金属层之间的分隔距离D是不同的。我们发现,使用PGS可以有效地补偿高温下电感器的Q因子下降。在0.18μm工艺的PGS的所有几何参数中,参数D是屏蔽效果的关键因素,并且M1 PGS在298 K至358的温度范围内在改善电感性能方面比Poly Strip PGS有效得多。 K.但是,在0.35μm工艺中,后者要好于前者。

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