A fast-settling 3 V CMOS buffer amplifier

摘要

This paper presents a two-stage fast, power-efficient 3 V CMOS buffer amplifier with rail-to-rail input/output voltage ranges. Because of its constant g/sub m/, class-AB input stage, the amplifier is free of slew-rate limitation and its settling-time is quasi-independent on input step amplitude. The amplifier has 6 MHz unity-gain frequency, 1 mW power-consumption and settles to 1% accuracy within 180 ns on 100 pF load. As the class-AB input stage operates at constant quiescent current over the input voltage range, CMRR exceeds 70 dB.