Sub-word parallelism in digital signal processing

摘要

We deal with parallelism at the data level. We describe annimplementation of the architectural technique called sub-wordnparallelism (SWP), which increases parallelism at the data-element-levelnby means of partitioning a processor's data path. The specificnimplementation we focus on is based on the TigerSHARC DSP architecture,ndeveloped at Analog Devices, Inc. As a result of SWP, the same data pathnand computation units perform more than one computation on an N-elementncomposite word. This composite word consists of more than one adjacentnsub-words. SWP is quite common and exists in production versions of mostnmajor general-purpose microprocessors. We also present an implementationnof an FIR filter in the TigerSHARC using data-level SWP as an example