Optimised weighted-resistor digital to analogue converter

摘要

From the classical weighted-resistor (WR) digital to analogue converter (DAC), two- stage DACs are derived. Conditions for minimum spread and the minimum total resistance for the two-stage DACs are derived. The theory is extended to multistage WR DACs. Thus, an optimised WR DAC is obtained that has minimum spread and the minimum total resistance and is therefore, suitable for economic fabrication in integrated circuit form.