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Modelling and setting times of amplifiers in SC circuits

机译:SC电路中放大器的建模和设置时间

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摘要

Various types of amplifier used in SC circuits are modelled and compared by studying their settling behaviour when they are embedded in a capacitive environment. It is shown that the frequently used buffered op-amp model does not coincide with the amplifiers used in practical SC circuits. The comparison of single and two stage amplifiers shows definite advantages in the former especially when built as cascode OTAs. Formulas for the performance under slew rate conditions are also developed. Lastly, simulated frequency responses using the two amplifiers with high clock rates are reported.
机译:对SC电路中使用的各种放大器进行建模和比较,方法是研究它们嵌入电容性环境时的建立行为。结果表明,经常使用的缓冲运算放大器模型与实际SC电路中使用的放大器不一致。单级和两级放大器的比较在前者中显示出明显的优势,特别是当以共源共栅OTA形式构建时。还建立了摆率条件下的性能公式。最后,报告了使用两个具有高时钟速率的放大器的模拟频率响应。

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