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Hardware implementation of a pulse-stream neural network

机译:脉冲流神经网络的硬件实现

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The authors describe the design and test of an artificial neuralnnetwork, using a pulse-stream approach, that is implemented using BiCMOSntechnology. Networks are constructed from arrays of customised neuronnchips and synapse chips. The neuron chip uses novel circuitry tonimplement an accurate sigmoid transfer characteristic. The synapse chipnuses a new pulse-stream implementation of the differential amplifier andnrequires only five transistors to produce a linear multiplier. Measurednresults from the chips show that the neuron has an accurate sigmoidntransfer characteristic and gradient suitable for the errornbackpropagation learning algorithm. The synapse has excellent 1%nlinearity and properties suitable for multiplication. The chips havenbeen used to implement a three-layer artificial neural network which hasnbeen tested using hard learning problems
机译:作者描述了使用BiCMOSn技术实现的脉冲流方法对人工神经元网络的设计和测试。网络由定制的神经元芯片和突触芯片阵列构成。神经元芯片使用新颖的电路实现精确的乙状结肠转移特性。突触芯片化了差分放大器的新脉冲流实现方式,并且仅需要五个晶体管即可产生线性乘法器。芯片的测量结果表明,神经元具有准确的S型传递特性和梯度,适用于误差反向传播学习算法。突触具有出色的1%非线性和适合乘法的特性。这些芯片尚未用于实现三层人工神经网络,该网络尚未使用硬学习问题进行过测试

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