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首页> 外文期刊>IEE proceedings. Part G >Sensitivity study and improvements on a nonlinear resistive-type neuron circuit
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Sensitivity study and improvements on a nonlinear resistive-type neuron circuit

机译:非线性电阻型神经元电路的灵敏度研究与改进

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摘要

A generalised VLSI circuit realisation for a nonlinear active resistor-type neuron is proposed that implements a saturating sigmoidal-like function by combining the nonlinear characteristics of NMOS and PMOS transistors. The circuit design is based on using a parameter sensitivity analysis to develop a robust design that will be relatively insensitive to process-parameter variations over the area of the die. The nonlinear resistor has been integrated into a module which realises a programmable digital synaptic weight capability. A neuron is effectively formed from the parallel interconnection that takes place as multiplier outputs are connected to create an input node to the resultant distributed neuron. Designs in 0.35 and 0.8 /spl mu/m processes are compared with a conservative 1.2 /spl mu/m CMOS implementation.
机译:提出了一种用于非线性有源电阻器型神经元的通用VLSI电路实现,该电路通过结合NMOS和PMOS晶体管的非线性特性来实现饱和S形函数。电路设计基于使用参数灵敏度分析来开发鲁棒的设计,该设计对芯片面积上的工艺参数变化相对不敏感。非线性电阻器已集成到模块中,该模块可实现可编程的数字突触权重功能。一个神经元实际上是由并行互连形成的,该并行互连是在乘法器输出连接到生成的分布式神经元的输入节点时发生的。将0.35和0.8 / spl mu / m工艺中的设计与保守的1.2 / spl mu / m CMOS实现进行了比较。

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