10-bit switched-current digital-to-analogue converter

摘要

The design of a 10-bit switched-current digital-to-analogue (D/A) converter is presented. A combined-input algorithm is adopted to reduce both architecture and power dissipation. The proposed D/A converter is implemented with a standard 0.35 (mu)m CMOS process technology. The chip occupies an area of 0.35 mm~(2) and consumes a small power of 26.1 mW with speed-up to 31.25 Msamples/s.