Design of DC-side fault current limiter for MMC-HVDC systems: Safety of the MMC along with frequency stability

摘要

A high voltage direct current system based on the modular multi-level converter (MMC-HVDC) is introduced as a suitable device for transmission of bulk powers over long distances. A pole-to-pole DC-side fault is a significant challenge for the MMC-HVDC system. Three main problems are the appearance of voltage spikes following a fast DC fault current break up, frequency instability due to insufficient inertia (networks such as renewable energy-based systems) and destruction of anti-parallel diodes within the MMC due to the high fault current. This study proposes a novel method for limiting DC fault current, improving isolation of the three-phase AC system from the DC-side. The suggested design employs high power resistors as virtual load such that continuity in active power flow will be kept on. Further, this prevents frequency deviation from exceeding the allowable limits. Also, transient over-voltages will be limited which are coming from stray inductances linked with electromagnetic effects of fault current level. Simulations and design practical issues have verified the validity of the proposal by using MATLAB/Simulink.