Integrated Circuits and 3D-Packaging for Low-Power 24 GHz Front End

摘要

Design and experimental results for a low-power monolithic 24 GHz front end are described. As basic circuits VCO and mixer are presented. The circuits are realized on GaAs using heterobipolar transistors The VCO reaches 19% efficiency at 4.3 dBm output power and 14,5 mW DC power consumption. The circuits are to be integrated together with a special slot antenna using flip-chip technology. Simulation data on this novel antenna approach demonstrate acceptable gain characteristics around 3 dB, despite of its small size