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Development And Validation Of A General-purpose Asic Chip For The Control Of Switched Reluctance Machines

机译:开关磁阻电机控制通用ASIC芯片的开发与验证

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摘要

A general-purpose application specific integrated circuit (ASIC) chip for the control of switched reluctance machines (SRMs) was designed and validated to fill the gap between the microcontroller capability and the controller requirements of high performance switched reluctance drive (SRD) systems. It can be used for the control of SRM running either in low speed or in high-speed, i.e., either in chopped current control (CCC) mode or in angular position control (APC) mode. Main functions of the chip include filtering and cycle calculation of rotor angular position signals, commutation logic according to rotor cycle and turn-on/turn-off angles (θ_(on)/θ_(off)). controllable pulse width modulation (PWM) waveforms generation, chopping control with adjustable delay time, and commutation control with adjustable delay time. All the control parameters of the chip are set online by the microcontroller through a serial peripheral interface (SPI). The chip has been designed with the standard cell based design methodology, and implemented in the central semiconductor manufacturing corporation (CSMC) 0.5 μm complementary metal-oxide-semiconductor (CMOS) process technology. After a successful automatic test equipment (ATE) test using the Nextest's Maverick test system, the chip was further validated through an experimental three-phase 6/2-pole SRD system. Both the ATE test and experimental validation results show that the chip can meet the control requirements of high performance SRD systems, and simplify the controller construction. For a resolution of 0.36° (electrical degree), the chip's maximum processable frequency of the rotor angular position signals is 10 kHz, which is 300,000 rev/min when a three-phase 6/2-pole SRM is concerned.
机译:设计并验证了用于控制开关磁阻电机(SRM)的通用专用集成电路(ASIC)芯片,以填补微控制器功能与高性能开关磁阻驱动(SRD)系统的控制器要求之间的空白。它可用于控制以低速或高速运行的SRM,即以斩波电流控制(CCC)模式或角位置控制(APC)模式运行。该芯片的主要功能包括转子角位置信号的滤波和周期计算,根据转子周期和开/关角(θ_(on)/θ_(off))的换向逻辑。可控制的脉冲宽度调制(PWM)波形生成,具有可调延迟时间的斩波控制和具有可调延迟时间的换向控制。微控制器通过串行外围接口(SPI)在线设置芯片的所有控制参数。该芯片采用基于标准单元的设计方法进行设计,并在中央半导体制造公司(CSMC)0.5μm互补金属氧化物半导体(CMOS)工艺技术中实施。在使用Nextest的Maverick测试系统成功进行自动测试设备(ATE)测试之后,该芯片通过一个实验性的三相6/2极SRD系统进行了进一步验证。 ATE测试和实验验证结果均表明该芯片可以满足高性能SRD系统的控制要求,并简化了控制器的构造。对于0.36°(电度)的分辨率,芯片的转子角位置信号的最大可处理频率为10 kHz,如果涉及三相6/2极SRM,则为300,000转/分钟。

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