Asymmetric cascaded multilevel inverter with charge balance control of a low resolution symmetric subsystem

摘要

In this paper, the topology of an asymmetric cascaded multilevel inverter has been developed in order to achieve the possibility of charge balance control method application. The proposed topology consists of various series connected units including symmetric cascaded multilevel inverter. A new algorithm for determination of magnitudes of dc voltage sources has been presented which is possible to generate all levels (odd and even) in output voltage. Two conventional charge balance control methods have been developed to symmetrically charge the dc sources and to equalize the losses value in switches related to each bridge in each unit. The life time of the dc sources which exist in each unit is equalized as a result the charging or substitution time of dc sources is reduced which leads to a reduction in the maintenance cost of inverter. Also, the bridges can be packaged because of the equalization of losses value in switches of each bridge. Consequently, the design cost of the inverter decreases due to the topology similarity of bridges in each unit. The operation and performance of the proposed multilevel inverter has been verified by the simulation and experimental results of a single-phase 49-level multilevel inverter.