Efficient CIC-based architecture with improved aliasing rejection and reduced computational complexity

摘要

A useful cascaded integrator comb (CIC)-based architecture is presented that improves the worst-case alias rejection of the CIC filter and simultaneously reduces the computational load of its integration section. Since regularity and simplicity are acceptably preserved, the proposed design outperforms other recent CIC-based architectures from literature where these two desirable characteristics are severely affected.