The LMK04000B, LMK04001B, LMK04011B, LM-K04031B, and LMK04033B clock jitter cleaners can provide ultra-low-noise clocks without external high-performance VCXO modules. Using a simple external crystal and the company's proprietary cascaded PLLatinum architecture, the devices provide sub-200-fs rms jitter to improve system performance and accuracy. The PLLatinum architecture consists of two cascaded PLLs, a low-noise crystal oscillator circuit, and a VCO, as well as low-noise dividers and drivers. The first PLL can be configured to use a simple external crystal or a VCXO module to provide the jitter-cleaning function while the second PLL uses the integrated VCO to perform low-noise clock generation. The LMK04000B and LMK04001B offer 24.4 mW-ps per channel, the LMK04031B and LMK04033B 25.4 mW-ps per channel, and the LMK004011B 37.4 mW-ps per channel. These devices feature dual-redundant inputs, five differential outputs, and an optional default-clock upon power-up. The input block is equipped with loss of signal detection and automatic or manual selection of the reference clock.
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