RapidIO fabric is validated at system level

摘要

Results from one of the first tests of the RapidIO switch fabric show that in an initial implementation the interconnect has achieved 97 percent of its theoretical performance after accounting for 4 percent protocol overhead. Such results indicate the technology's maturity for use in signal and control-plane applications. Our test system connected PowerPC microprocessors over a backplane using an 8-bit parallel implementation of the RapidIO architecture. The RapidIO switch fabric is an interconnect linking chips on a circuit board and circuit boards across a backplane in a manner designed for low latency as well as bandwidth, and reliability as well as scalability. RapidIO interfaces are small and efficient enough to have one or more interfaces on digital signal processors, field-programmable gate arrays, network processors and con-system, the RapidIO interconnect simplifies system design while improving system performance.