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0-In pumps up assertion-based verification suite

机译:0-In提升基于断言的验证套件

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Santa Cruz, Calif. ― Armed with two new products and new technology, 0-In Design Automation is rolling out version 2.0 of its assertion-based verification suite this week. The company claims new algorithms that can dramatically speed performance, find clock-domain crossing signals and spot tough corner-case bugs other approaches miss. The new 0-In Confirm uses model checking and 0-In's Deep Counter Example (DCE) technology to find corner-case bugs. 0-In Checklist, also new, synthesizes and analyzes register-transfer-level netlists, finds clock-domain crossing signals and creates protocol monitors that can be used in simulation or formal verification.
机译:加利福尼亚州圣克鲁斯市-配备了两种新产品和新技术的0-In Design Automation公司将于本周推出其基于声明的验证套件的2.0版。该公司声称新算法可以极大地提高性能,找到时钟域交叉信号,并发现其他方法遗漏的棘手错误。新的0-In Confirm使用模型检查和0-In的Deep Counter Example(DCE)技术来查找极端情况下的错误。 0-in Checklist(也是新的)可以综合和分析寄存器传输级网表,查找时钟域交叉信号,并创建可用于仿真或形式验证的协议监视器。

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