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An Artificial Neural Network at Device Level Using Simplified Architecture and Thin-Film Transistors

机译:使用简化架构和薄膜晶体管的设备级人工神经网络

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We show a neural network at the device level that uses a simplified architecture and thin-film transistors (TFTs). First, we form a neuron unit from eight transistors and reduce the synapse unit to only one transistor by employing characteristic variations of the synapse transistors to adjust the connection strength. Second, we compose a “local interconnective neural network” that is optimal for integrated circuits, in which we connect each neuron to four neighboring neurons through pairs of synapses: A “cooperatory synapse” and an “oppository synapse.” Third, we fabricate the neural network using thin-film technology, which is expected to be widely used for giant microelectronics. Although the device architecture is quite different from conventional systems, the neural network is confirmed to unsupervisedly learn any logic, such as or and xor, which is not linearly separable and is a standard logic used to test the performance of a neural network. Using this simplified architecture and TFTs, a large-scale neural network comparable with the human brain may be integrated.
机译:我们在设备级别显示了一个神经网络,该网络使用简化的体系结构和薄膜晶体管(TFT)。首先,我们由八个晶体管组成一个神经元单元,并通过利用突触晶体管的特性变化来调节连接强度,从而将突触单元减少到一个晶体管。其次,我们组成了一个最适合集成电路的“局部互连神经网络”,其中我们通过一对突触将每个神经元连接到四个相邻的神经元:“协作突触”和“对位突触”。第三,我们使用薄膜技术制造神经网络,有望将其广泛用于巨型微电子学。尽管设备体系结构与常规系统有很大不同,但已确认神经网络可以无监督地学习任何不可线性分离的逻辑,例如or和xor,并且是用于测试神经网络性能的标准逻辑。使用这种简化的体系结构和TFT,可以集成与人脑相当的大规模神经网络。

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