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Investigation of undesired ripple voltage across power source side and solutions in military low-frequency immunity tests

机译:军用低频抗扰度试验中电源侧的不期望的纹波电压的研究

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摘要

The MIL-STD-461 CS101 test is one of the essential low-frequency conducted immunity tests for military and aerospace equipment, however it includes some challenges in application. The major challenge is the necessity for the measurement of injected CS101 ripples under the power frequency of the EUT. The measurement of CS101 ripples on the power frequency is almost impossible without taking some extra precautions. In addition to the hard necessity of measuring the CS101 ripple voltage induced across the EUT power input, the other challenge of measuring the ripple voltage that drops across the power source side under the AC power frequency of the EUT is now required by MIL-STD-461G, which aggravates the severe CS101 test conditions of AC devices. In this paper, we propose a FFT-based time domain solution and a method to instantly check the ripple voltage that drops across the power source side, in other words across the 10 μF test capacitor, during the test under the AC EUT power frequency and to verify that it is low enough and not affecting the reliability of the test. The method proposed in this paper significantly overcomes the CS101 test challenges and makes CS101 test results more accurate. In this paper, we also extensively focused on effective solutions to reduce the ripple voltage induced across the power source side along with measurement uncertainty analysis.
机译:MIL-STD-461 CS101测试是军事和航空航天设备的基本低频测试之一,但它在应用中包含一些挑战。主要挑战是在EUT的功率频率下测量注入的CS101波纹的必要性。在不采取一些额外的预防措施的情况下,功率频率上的CS101波纹的测量几乎是不可能的。除了测量在EUT电源输入上引起的CS101纹波电压的难度外,现在MIL-STD现在需要测量在EUT的交流电源侧下降的纹波电压的其他挑战461G加剧了AC器件的严重CS101测试条件。在本文中,我们提出了一种基于FFT的时域解决方案和方法,以便在AC EUT功率频率下测试期间换句话说,换句话说,换句话说,换句话说,换句话说,换句话说,换句话说。要验证它足够低,而且不会影响测试的可靠性。本文提出的方法显着克服了CS101测试挑战,使CS101测试结果更准确。在本文中,我们还广泛专注于有效的解决方案,以减少电源侧引起的纹波电压以及测量不确定性分析。

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