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Structured ASIC offers memory-for-logic swapping

机译:结构化ASIC提供逻辑存储交换

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CONFIGURABLE-CORE and structured-ASIC vendor eASIC Corp and its partner Flextronics Semiconductor have released a structured ASIC that allows users to configure the amount of logic, memory, and reprogrammable logic they need for a given design. The company's executive vice president for marketing, Ronnie Vasishta, says that the new FlexASIC fabric gives users the best of the FPGA and the ASIC worlds: the density and speed associated with ASICs without the NRE (nonrecurring-engineering) costs and the programmability of FPGAs without the power and performance shortcomings. "FlexASIC offers a 25- to 30-times density improvement over FPGAs with power density and performance akin to cell-based design," says Vasishta, claiming FlexASIC operates at approximately 400 MHz.
机译:CONFIGURABLE-CORE和结构化ASIC厂商eASIC Corp及其合作伙伴Flextronics Semiconductor发布了结构化ASIC,允许用户配置给定设计所需的逻辑,内存和可重编程逻辑数量。该公司市场执行副总裁Ronnie Vasishta表示,新的FlexASIC架构为用户提供了FPGA和ASIC领域的最佳选择:与ASIC相关的密度和速度,而无需NRE(非循环工程)成本和FPGA的可编程性没有功能和性能上的缺点。 Vasishta说:“ FlexASIC与FPGA相比,密度提高了25到30倍,功率密度和性能类似于基于单元的设计。”他声称FlexASIC的工作频率约为400 MHz。

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