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Interface chips: between logic and a hard place

机译:接口芯片:在逻辑与困难之间

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Logic signals have fallen from the 15V of the old CMOS 4000 series to 5V TTL (transistor-to-transistor rnlogic) to modern CMOS levels of 3.3, 2.7, and 1.8 V. Advanced processes use digital logic that operates at 1V or lower, although they offer higher I/O voltages. These ever-dropping logic voltages still must drive solenoids, twisted-pair wiring, and discrete-semiconductor-power stages, so they require external interface circuits. You need to understand rnthese circuits, which run the gamut from FET drivers to open-collector solenoid drivers to LVDS (low-voltage-differential-signaling) and isolated drivers.
机译:逻辑信号已从旧的CMOS 4000系列的15V下降到5V TTL(晶体管到晶体管的逻辑),再到3.3、2.7和1.8V的现代CMOS电平。高级工艺使用的数字逻辑的工作电压为1V或更低。它们提供更高的I / O电压。这些不断下降的逻辑电压仍然必须驱动螺线管,双绞线和分立半导体功率级,因此它们需要外部接口电路。您需要了解这些电路,这些电路的范围从FET驱动器到集电极开路螺线管驱动器再到LVDS(低压差分信号)和隔离驱动器。

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