Digital-debugging methods save time

摘要

If you are performing validation tests or debugging circuits, you can save time by using three logic-analyzer techniques that combine stimulus and real-time trace capture: simulating the input to a circuit and capturing traces with the logic analyzer to validate the correct response to a given stimulus; using the logic analyzer to capture traffic and quickly convert the real-time trace into a stimulus for a pattern generator; and introducing known input errors, using the pattern generator, to test the circuits' reaction to inputs that are out of specification.