Small-Delay-Defect Testing

摘要

Semiconductor companies have come to rely on delay testing to attain high defect coverage of manufactured digital ICs. Delay testing uses TD (transition-delay) patterns that ATPG (automatic-test-pattern-generation) tools create to target subtle manufacturing defects in fabricated designs. Although TD ATPG improves defect coverage beyond the levels that stuck-at patterns alone can achieve, the method is limited in its ability to reach the test-quality levels that nanometer designs require. As a result, STMicroelectronics is deploying SDD (small-delay-defect) ATPG as a means of achieving even higher defect coverage than standard TD ATPG.