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Endpoint distortion

机译:端点失真

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摘要

Figure la and Figure lb depict two common transmission-line scenarios: series termination and end termination, respectively. Both drivers are fast with negligible series output resistance. The capacitive loads represent the input capacitances of the CMOS receivers. In the series-terminated case, a step edge from the driver proceeds to the right, interacts with the load, and reflects back toward the driver. The capacitive load may create a strange-looking reflection, and it may distort the appearance of thernreceived signal, but whatever bounces off the load returns to the driver termination and dies, never to be seen again. As a result, the receiver sees one step edge, possibly distorted but with no lingering aftereffects. Of all the things that could go wrong with a circuit, this distortion is not too bad.rnFigure 1 illustrates an equivalent-endpoint circuit that defines the nature of instantaneous signal distortion at the receiver. The equivalent circuit comprises two components: a series resistance equal to the line impedance, and a shunt capacitance representing the input capacitance of the receiver (Reference 1).
机译:图1a和图1b分别描绘了两种常见的传输线场景:串联终端和终端终端。两种驱动器均具有快速的串联输出电阻,可以忽略不计。容性负载代表CMOS接收器的输入电容。在串联终止的情况下,驾驶员的脚步边缘向右移动,与负载相互作用,然后向驾驶员反射。容性负载可能会产生看起来怪异的反射,并且可能会使接收到​​的信号失真,但是无论负载反弹如何,都会返回到驱动器终端并死掉,再也看不到。结果,接收器看到一个台阶边缘,该台阶边缘可能变形了,但没有残留的后遗症。在电路可能出现的所有问题中,这种失真还算不错。图1所示的等效端点电路定义了接收器处瞬时信号失真的性质。等效电路包括两个组件:一个等于线路阻抗的串联电阻,一个代表接收器输入电容的并联电容(参考文献1)。

著录项

  • 来源
    《Electrical Design News》 |2009年第11期|14-14|共1页
  • 作者

    HOWARD JOHNSON;

  • 作者单位
  • 收录信息 美国《科学引文索引》(SCI);
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

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