Three-phase phase-locked loop algorithm and application to a static synchronous compensator

摘要

This work presents a phase-locked loop (PLL) algorithm for the detection of positive-sequence and negative sequence grid voltages in three-phase systems. Since it employs an adaptive filter (AF), it is possible to track the fundamental component of the grid voltages accurately even in the presence of harmonics, subharmonics, and interharmonics. This aspect is of major concern for practical applications, especially because some popular algorithms present limited performance in such scenarios, e.g., the decoupled double synchronous reference frame PLL (DDSRF-PLL) and double second-order generalized integrator frequency-locked loop (DSOGI-FLL). A thorough comparison among the proposed method and other similar structures is presented in terms of steadystate and dynamic behaviors to show that the introduced PLL presents high immunity to power quality disturbances. Unfortunately, a possible drawback lies in the slow dynamic response due to the AF. In order to verify the applicability of the proposed approach, it is also incorporated to the control structure of a grid-connected power converter operating as a static synchronous compensator (STATCOM). This converter aims at regulating the ac voltage at the point of common coupling (PCC) and power factor correction. A detailed mathematical analysis is presented and experimental results are also discussed to validate the theoretical assumptions.