Improved sinusoid-locked loop equipped with a virtual stator impedance to estimate the grid voltage parameters

摘要

Grid voltage parameters, including the amplitude, frequency and phase angle, are the essential information for the control and protection of power systems. The sinusoid-locked loop (SLL) is a novel approach to estimate the grid voltage parameters, which achieves accurate estimation and strong robustness in the presence of harmonic disturbances. However, the conventional SLL is sensitive to large voltage variations or computation errors, which may fail to achieve accurate estimation when the controller is trapped in the undesired equilibrium. In this paper, a modified sinusoid-locked loop (MSLL) is designed to improve the estimation performance with respect to large voltage variations. A virtual stator impedance is introduced to eliminate the undesired equilibrium, which mimics the armature reaction of a virtual synchronous machine (VSM). In addition, the closed-loop stability is investigated based on the small-signal model of the proposed MSLL. Following the idea of the VSM, the output voltage of the VSM is locked with the input grid voltage when the real power and reactive power are both driven to zero. Simulation and experimental results are presented to illustrate the effectiveness of the proposed MSLL, which achieves excellent estimation performance in the presence of large voltage variations and harmonic disturbances.