Engineers will find a variety of debugging tools among the design software offered by FPGA vendors. The tools place debug logic into a design so a host PC can access the FPGA's internal conditions, memory contents, register data, and so on. Engineers can set the trigger conditions that initiate data capture and storage of data in internal RAM. The PC, which communicates with the FPGA through a JTAG connection, also can configure internal FPGA settings and force signals into known states.rn"When engineers are up against a deadline and they must debug an FPGA chip, they don't want to create their own debug logic to probe the chip," said Brian Caslis, software marketing engineer at Lattice Semiconductor. "They need something they know will work and that they can quickly insert into their circuit."
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