Test data compression is one of the main objectives to make reliable in testing System on chip design. The data compression mainly relies in the areas of hardware, time and power consumed. This paper presents an efficient test data compression method to achieve high compression ratio. The test patterns have 1, 0 and undefined (x) data. The test patterns are grouped such that to improve compression ratio. While grouping the undefined bits is also assigned as 1, 0 and conflict bit (c). The experimental result shows that the compression ratio achieved is highly desirable. It is targeted to ISCAS 89 bench mark circuit.
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