Hardware in the loop co-simulation of finite set-model predictive control using FPGA for a three level CHB inverter

摘要

Along with the development of powerful microprocessors and microcontrollers, the applications of the model predictive controller, which requires high computational cost, to fast dynamical systems such as power converters and electric drives have become a tendency recently. In this paper, two solutions are offered to quickly develop the finite set predictive current control for induction motor fed by 3-level H-Bridge cascaded inverter. First, the field programmable gate array (FPGA) with capability of parallel computation is employed to minimize the computational time. Second, the hardware in the loop (HIL) co-simulation is used to quickly verify the developed control algorithm without burden of time on hardware design since the motor and the power switches are emulated on a real-time platform with high-fidelity mathematical models. The implementation procedure and HIL co-simulation results of the developed control algorithm shows the effectiveness of the proposed solution.