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首页> 外文期刊>Applied Sciences >A 24.88 nV/√Hz Wheatstone Bridge Readout Integrated Circuit with Chopper-Stabilized Multipath Operational Amplifier
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A 24.88 nV/√Hz Wheatstone Bridge Readout Integrated Circuit with Chopper-Stabilized Multipath Operational Amplifier

机译:A 24.88 NV /√Hz惠斯通桥读出集成电路,具有斩波稳定多径运算放大器

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This paper proposes a low noise readout integrated circuit (IC) with a chopper-stabilized multipath operational amplifier suitable for a Wheatstone bridge sensor. The input voltage of the readout IC changes due to a change in input resistance, and is efficiently amplified using a three-operational amplifier instrumentation amplifier (IA) structure with high input impedance and adjustable gain. Furthermore, a chopper-stabilized multipath structure is applied to the operational amplifier, and a ripple reduction loop (RRL) in the low frequency path (LFP) is employed to attenuate the ripple generated by the chopper stabilization technique. A 12-bit successive approximation register (SAR) analog-to-digital converter (ADC) is employed to convert the output voltage of the three-operational amplifier IA into digital code. The Wheatstone bridge readout IC is manufactured using a standard 0.18 μm complementary metal-oxide-semiconductor (CMOS) technology, drawing 833 μA current from a 1.8 V supply. The input range and the input referred noise are ±20 mV and 24.88 nV/√Hz, respectively.
机译:本文提出了一种低噪声读出集成电路(IC),具有适用于惠斯通桥传感器的斩波稳定的多径运算放大器。读出IC的输入电压由于输入电阻的变化而变化,并且使用具有高输入阻抗和可调节增益的三运算放大器仪表放大器(IA)结构有效地放大。此外,将斩波稳定的多径结构施加到运算放大器,并且使用低频路径(LFP)中的纹波还原回路(RRL)来衰减由斩波稳定技术产生的纹波。采用12位连续近似寄存器(SAR)模数转换器(ADC)来将三运算放大器IA的输出电压转换为数字代码。惠斯通桥读数IC由标准的0.18μm互补金属氧化物半导体(CMOS)技术制造,从1.8V电源绘制833μA电流。输入范围和输入引用的噪声分别为±20 mV和24.88nv /√Hz。

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