Parallel Monte Carlo on Intel MIC Architecture

摘要

Trade-off between the cost-efficiency of powerful computational accelerators and the increasing energy needed to perform numerical tasks can be tackled by implementation of algorithms on the Intel Multiple Integrated Cores (MIC) architecture. The best performance of the algorithms requires the use of appropriate optimization and parallelization approaches throughout all process of their design. Monte Carlo methods and Quasi-Monte Carlo methods depend on a huge number of computational cores. In this paper we present the advances in our studies on the performance of algorithms for solving multidimensional integrals on Intel MIC architecture and their comparison with the performance of Monte Carlo methods. The fast implementations are due to the high parallelism in the operations with the many coordinates of the sequences achieved with the Intel MIC architecture. These implementations are easy to be integrated and demonstrate high performance in terms of timing and computational speeds.