Performance Estimation of Voltage Controlled Ring Oscillator Designed for Soc Application

摘要

Over the past few years there has been an interest toward SoC (System on Chip) chips having features like low power, portable, high packing density, high speed, modularity, and low cost electronics increasing complexity of analog circuit design. A number of factors such as advancement of internet, mobile technology, defence and critical engineering areas are driving the increase of analog and Mixed-Signal (AMS) contention in SoC. As a result, there is an increasing need to re-design functioning of AMS designs for new technology processes within a short time span. A voltage controlled oscillator (VCO) is an integral part of many electronic systems and has many applications .Hence, there is huge demand for developing a technique which can answer such high level of complexity of VCO design in SoC by optimizing their performance parameters to desired specification. Therefore, it is an open, urgent as well as attractive research area. In this work, performance estimation of voltage controlled ring oscillator(R-VCO) is done using GUI based methodology. It has the two models such as implementation and behavioral models developed in Matlab/Simulink and HDL coder environment. The implementation model is designed in SPICE compatible environment. The auto-generated test bench is obtained with the help behavioral model. This gives user confidence in the designed system before fabrication process. A design for a Voltage-controlled ring oscillator (R-VCO) is presented using 0.18um CMOS technology and 3.3 V power supply. The VCO topology exhibits tuning range from 8 MHz to 454 MHz and features the low power dissipation of 0.42mW at the maximum oscillation frequency. Phase noise measured for simulated circuit is -80dBc/Hz at 1 MHz.