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An Approach towards Logic Synthesis by Functional Decomposition

机译:通过功能分解进行逻辑综合的一种方法

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This paper surveys some of the basic principles behind logic synthesis. A few methods of logic synthesis are also discussed. Functional decomposition is an efficient technique for synthesis of logic circuits targeted on Look Up Table based FPGAs. It decomposes any circuit into a network of sub circuits. A method of functional decomposition for single output XOR based circuits is presented. It utilizes Gauss Jordan elimination, a method based on linearity, to decompose the circuits. The method was tested on a set of MCNC benchmark circuits in Blif format, and was successful in decomposing circuits efficiently. In case of XOR based circuits, the XOR relationship between the different sub circuits can be exposed by this method. A reduction in area was obtained due to this in case of large XOR based circuits and hence can be used for area driven logic synthesis.
机译:本文概述了逻辑综合背后的一些基本原理。还讨论了几种逻辑综合方法。功能分解是一种用于合成基于基于查找表的FPGA的逻辑电路的有效技术。它将任何电路分解为子电路网络。提出了一种基于单输出异或电路的功能分解方法。它利用基于线性的方法高斯约旦消除法分解电路。该方法在一组Blif格式的MCNC基准电路上进行了测试,并成功地有效分解了电路。在基于XOR的电路的情况下,不同子电路之间的XOR关系可以通过此方法公开。因此,在基于大型XOR的电路中,面积会减小,因此可用于区域驱动逻辑综合。

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