An On-Chip Bus Tracer Analyzer With Amba AHB For Real Time Tracing With Lossless Data Compression For SOC

摘要

The Advanced Microcontroller Bus Architecture (AMBA) widely used as the on-chip bus in System-on-a-chip (SoC) designs. The important aspect of a SoC is not only which components or blocks it houses, but also how they are interconnected. AMBA is a solution for the blocks to interface with each other. The biggest challenge in SoC design is in validating and testing the system. AHB Bus Tracer is a significant infrastructure that is needed to monitor the on chip-bus signals, which is vital for debugging and performance analysis and also optimizing the SOC. Basically on chip signals are difficult to observe since they are deeply embedded in a SoC and no sufficient I/O pins are required to access those signals. Therefore, we embed a bus tracer in SoC to capture the bus signals and store them. The AMBA AHB should be used to which are high bandwidth and require the high performance of a pipelined bus interface. Performance can be improved at high-frequency operation. Performance is independent of the mark-space ratio of the clock. No special considerations are required for automatic test insertion. Our aim in this project is to Design the AHB- protocol with bus tracer. For real-time tracing, we should reduce the trace size as much as possible without reducing the original data.SYS-HMRBT supports tracing after/before an event triggering, named post-triggering trace/pre-triggering trace, respectively. SYS-HMRBT runs at 500 MHz and costs 42 K gates in TSMC 0.13- m technology, indicating that it is capable of real time tracing and is very small in modern SoCs.The experimental results show that trace compression ratio reduced by 96.32%. Finally this approach was designed successfully along with MODEL SIM and synthesis using Xilinx ISE. The SoC can be verified in field-programmable gate array.