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Hardware Realization of Artificial Neural Network Based Intrusion Detection & Prevention System

机译:基于人工神经网络的入侵检测与防御系统的硬件实现

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摘要

In the 21st century with the exponential growth of the Internet, the vulnerability of the network which connects us is on the rise at a very fast pace. Today organizations are spending millions of dollars to protect their sensitive data from different vulnerabilities that they face every day. In this paper, a new methodology towards implementing an Intrusion Detection & Prevention System (IDPS) based on Artificial Neural Network (ANN) onto Field Programmable Gate Array (FPGA) is proposed. This system not only detects different network attacks but also prevents them from being propagated. The parallel structure of an ANN makes it potentially fast for the computation of certain tasks. FPGA platforms are the optimum and best choice for the modern digital systems nowadays. The same feature makes ANN well suited for implementation in FPGA technology. Hardware realization of ANN to a large extent depends on the efficient implementation of a single neuron. However FPGA realization of ANNs with a large number of neurons is still a challenging task. The proposed multilayer ANN based IDPS uses multiple neurons for higher performance and greater accuracy. Simulation of the design in MATLAB SIMULINK 2010b by using Knowledge Discovery and Data Mining (KDD) CUP dataset shows a very good performance. Subsequently MATLAB HDL coder was used to generate VHDL code for the proposed design that produced Intellectual Property (IP) cores for Xilinx Targeted Design Platforms. For evaluation purposes the proposed design was synthesized, implemented and tested onto Xilinx Virtex-7 2000T FPGA device.
机译:在21世纪,随着Internet的指数级增长,连接我们的网络的脆弱性正在以非常快的速度增长。如今,组织花费数百万美元来保护其敏感数据免受每天面临的各种漏洞的影响。本文提出了一种在现场可编程门阵列(FPGA)上实现基于人工神经网络(ANN)的入侵检测与防御系统(IDPS)的新方法。该系统不仅可以检测到不同的网络攻击,还可以阻止传播它们。 ANN的并行结构使其可能快速地用于某些任务的计算。 FPGA平台是当今现代数字系统的最佳和最佳选择。相同的功能使ANN非常适合FPGA技术中的实现。 ANN的硬件实现在很大程度上取决于单个神经元的有效实现。然而,具有大量神经元的ANN的FPGA实现仍然是一项艰巨的任务。所提出的基于多层ANN的IDPS使用多个神经元来提高性能和准确性。使用知识发现和数据挖掘(KDD)CUP数据集在MATLAB SIMULINK 2010b中对设计进行的仿真显示了非常好的性能。随后,使用MATLAB HDL编码器为拟议的设计生成VHDL代码,该设计为Xilinx目标设计平台生成了知识产权(IP)内核。为了评估起见,在Xilinx Virtex-7 2000T FPGA器件上对提出的设计进行了综合,实施和测试。

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