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Design of a hardware/software FPGA-based driver system for a large area high resolution CCD image sensor

机译:基于硬件/软件FPGA的大面积高分辨率CCD图像传感器驱动系统设计

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A hardware/software field programmable gate array (FPGA)-based driver system was proposed and demonstrated for the KAF-39000 large area high resolution charge coupled device (CCD). The requirements of the KAF-39000 driver system were analyzed. The structure of “microprocessor with application specific integrated circuit (ASIC) chips” was implemented to design the driver system. The system test results showed that dual channels of imaging analog data were obtained with a frame rate of 0.87 frame/s. The frequencies of horizontal timing and vertical timing were 22.9 MHz and 28.7 kHz, respectively, which almost reached the theoretical value of 24 MHz and 30 kHz, respectively.
机译:提出并展示了一种基于硬件/软件现场可编程门阵列(FPGA)的驱动器系统,用于KAF-39000大面积高分辨率电荷耦合器件(CCD)。分析了KAF-39000驱动程序系统的要求。实现了“带有专用集成电路(ASIC)芯片的微处理器”的结构来设计驱动器系统。系统测试结果表明,以0.87帧/秒的帧速率获得了成像模拟数据的双通道。水平定时和垂直定时的频率分别为22.9 MHz和28.7 kHz,几乎分别达到理论值24 MHz和30 kHz。

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